A Quarterly Publication of
The Smith-Kettlewell Eye Research Institute’s
Rehabilitation Engineering Research Center
William Gerrey, Editor
Original support provided by:
The Smith-Kettlewell Eye Research Institute
and the National Institute on Disability and Rehabilitation Research
Note: This archive is provided as a historical resource. Details regarding products, suppliers, and other contact information are original and may be outdated.
Questions about this archive can be sent to
TABLE OF CONTENTS
[Note: This is an addendum to "The ISD Family of Voice-Message Chips," SKTF, Winter 1991.)
The literature tells you about the chip "locking up" when a recording is made to the end of memory. This holds for playback as well. If you hold down pin 23 so that all recordings are played back, pin 25 (end-of-message) will go low and stay there, and you will be unable to make the chip do anything until the power-down pin (24) is brought high to reset it.
There is a glitch present sometimes on the end-of-message pin during playback; a narrow downward pulse near the beginning of playback appears on pin 25. As you can see in the NOT-R/NOT-S flip-flop in "Simulating the Nattering RAM," (this issue), this glitch can be filtered out with a low-pass filter. Specifically, pin 25 goes through 47K, then through 0.1uF to ground; the cleaned-up signal is gotten at the junction of this resistor and capacitor.
More on Selectable options
Having a good test setup makes me want to clarify explanations of the selectable "modes" which you can get by tying address lines A6 and A7 high (pins 9 and 10). Quoting briefly from the original article, I will embellish as follows:
"Bringing A0 High
Bringing this high increases playback of the memory by a factor of 800 times." I suppose, somewhere deep in silicon, this feature works. However, the chip does not seem to recognize end-of-message markers in this mode. Therefore, when you push the start button (bringing pin 23 low), there are 20 milliseconds of fleeting activity on the end-of-message pin; then the chip locks up and has to be reset. Never have I been able to play back anything after I pressed the button in this mode.
"Bringing A2 High
Normally, the end-of-message pin (pin 25) carries two classes of signal--short pulses for every end of message, and a descent to logic low when the end of memory has been reached. With A2 (pin 3) high, the end-of-message pulses are stripped away, and pin 25 only goes low at the end of memory." (A2 is essentially one input of an OR gate, the other input of which gets end-of-message pulses; the output of this OR gate is the end-of-message pin. The end-of-memory signal goes through in any case.) "This feature is used when chips are cascaded; the end-of-memory signal enables (via pin 23) the succeeding chip."
"Bringing A3 High
With A3 (pin 4) high, the memory will play over and over as a continuous loop." this is true only when the start button is held down; if it is just tapped, the chip will play from the beginning of memory and stop at the first end-of-message marker. This mode overrides the operation of A4; you cannot get to a second message in memory to make it repeat. The description should be rewritten, "With A3 (pin 4) high, the first message will play over and over as a continuous loop, as long as the 'Enable' (pin 23) is held low."
"Bringing A4 High
Normally, the 'message start pointer' is reset to the beginning of memory--or to an addressed location--when the chip enable pin is operated." With A4 (pin 5) high, successive messages can be played or recorded. What you cannot do is step through messages in playback to a point you want to record--to "add" a message; unfortunately, flipping the record switch sends you back to the beginning of memory. The only way to add a message at the end of a string of them is to first drop out of the selectable mode operation by bringing pins 9 and 10 low, then, by experimentation, manipulating the address lines to find the exact position when the new message is to commence. Nevertheless, A4 is a handy mode for playing through the memory, chunk by chunk. (Remember that operating the "power-down pin" always sends you back to the beginning of memory.)
"Bringing A5 High
Normally, playback is initiated by a negative-going transition of the chip enable pin;" further triggering of the enable pin has no effect until the end-of-message marker has been reached. "With A5 high, playback is 'level-activated'; the chip plays back only as long as pin 23 (chip enable) is held low and ceases when pin 23 is brought high.
Operation of A1 in Conjunction With A4
I misread the data sheet on this mode. (It's not as if it modifies any recording previously made, which is what I gathered.) This mode works only if A4 is high and you are in record. You will remember that when A4 (pin 5) is high, recording of successive messages can be done. With A1 (pin 2) also high, no end-of-message markers are generated, and the entire length of all recordings made this way will play back. An end-of-message marker is tacked onto this series of recordings when the record switch is flipped back to play.
Single-Pole Pushbutton Operation with Automatic Reset
The ISD literature recommends use of a double-pole pushbutton--one pole for reset (pulling pin 24 high through a capacitor), and the other for triggering (pulling pin 23 to ground). Here's how I did it with a single-pole switch:
Pin 23 goes through 47K to VCC. Pin 23 also goes to the collector of a 2N2222 (NPN transistor); the emitter of the 2222 is grounded. The base goes through two 47K resistors in series to ground. The junction of these resistors goes through a normally open pushbutton to VCC. The junction of these resistors also goes through 0.1uF to pin 24 ("power-down" used for reset); pin 24 also goes through 200K to ground.
The specifications show a required setup time for the address lines--300 nanoseconds. One might think that after the chip is "powered up," its innards would have to be fed data information first, and only then should the chip be triggered. The automatic reset circuit they publish suggests otherwise; it seems that everything can be set up during a brief period of "power down," and when the chip wakes up, it reads its data lines and triggers properly.
Circuits in the "Prankophone" (see this issue) take advantage of that, and no time-delay circuit was needed in triggering pin 23 of the chip.
The August 5th, 1991, edition of EDN had a couple of interesting pieces on Information Storage Devices and their chips. Scattered here and there, tidbits can be summarized as follows:
The electrically erasable, programmable, read-only memory (EEPROM) can store voltage levels, not just logic highs and lows. ISD claims that they can store any of 230 voltage levels in each memory cell. (There is a 20-volt reference in the chip that aids in doing this.) There are 128,000 cells in this EEPROM.
They describe this EEPROM as using "floating gate" technology; one envisions insulated gate FET circuits in which the gate capacitance is such that you can put 'em somewhere and they'll stay for some time.
EEPROMs are typically very slow to program. They say that, to make this chip record in "real time," several samples are accumulated, and the EEPROM is loaded several cells at a time.
"Ah, sweet mystery of chips, I'm glad we found you."
The emergence of the speech recorder chip from Information Storage Devices (SKTF, Winter 1991) means that talking projects are simpler to build. The "Nattering RAM" (SKTF, Winter 1989) contains seventeen DIP sockets (counting two resistor packs and a DIP switch). This article attempts to simulate the control and handshaking functions of the Nattering RAM using this new product, and I was able to do so with only three DIP devices (counting the DIP switch). As yet, the ISD1016 is costly ($55), and the Nattering RAM may actually be cheaper to build. Also, the speech recording time is more adjustable in the Nattering RAM, since the clock rate is variable, and the message slots cannot accidentally overlap--as they can in the ISD chip. The simplicity of this circuit, however, is attractive.
Nattering RAM Features to be Duplicated
The start line of the Nattering RAM works somewhat differently from that of the ISD chip in playback. Besides requiring an inverted signal, the ISD chip starts speaking immediately with operation of the "start line"; the Nattering RAM operates on the trailing edge of a "start line" pulse. The Nattering RAM has complementary "word active" outputs which are activated with the leading edge of the start pulse, and terminate at the end of the spoken message. These features are reconstructed using the quad NAND gate (CD4011); the cross-connected gates form a "NOT R-NOT S" flip-flop that provides the word-active outputs, and two gates wired as cascaded inverters (one capacitively coupled so as to generate a "start pulse") duplicate the function of the Nattering RAM's start line.
The "abort" line of the Nattering RAM can be duplicated using the power-down pin of the ISD chip. However, on our voltmeter circuit (SKTF, Winter and Fall 1989), it was apparent that when the ISD chip is "powered up," it cannot be "started" immediately, and a delay in the start line was accomplished with a capacitor at the input of the first inverter.
The Smith-Kettlewell Talk-&-Tones Multimeter (SKTF, Fall 1989) needs to feed its tone output through the audio amplifier. Luckily, pin 11 of the ISD chip is capable of accepting this audio signal, making the tone audible whenever speech is not initiated.
The Nattering RAM has a pitch-shift input which is used to raise the pitch of numerals of a decimal fraction. The clock rate of the ISD chip cannot be tampered with; however, there is enough memory space to record two sets of numerals, one set in a low voice and another in a higher voice (one male and one female, if you like). Therefore, a higher-order address line can be used as a "pitch-shift" input--switching from one number set to the other.
Recording the Numbers
The recording procedure is straightforward. A desired address is selected with the DIP switches going to pins 3 through 9. The DIP switch on pin 27 is closed to put the chip into record mode, then the start button is pressed while the word is spoken briskly into the microphone.
With this circuit, the "start" pushbutton--held down during record and tapped for testing playback--is connected directly to the ISD chip's pin 23, after the 4011 inverter which pulses this start line. This is necessary so that pin 23 can be held low for the duration of the recording.
Adhering to the Nattering RAM model, four address lines are operated by external circuitry, and spoken numerals are loaded into memory in the order of BCD (binary-coded decimal). If only sixteen words are required, the address lines chosen can be pins 4 (least-significant), 5, 6, and 9 (most-significant). With this arrangement, the allotted time of each message slot will be 0.8 seconds. If two BCD number sets are required, the allotted time for each message is 0.4 seconds.
Running over this time allotment means that recording a succeeding message will obliterate the end-of-message marker that belongs to the earlier message--two messages will be strung together when played. Thus, you must speak quickly and avoid running messages together. When you are finished, play each one to see if it is mistakenly adjoining the next. Re-recording the earlier one will fix the problem (unless you dally on the record button and damage the latter message).
Table of Message Addresses for the Talk-&-Tones multimeter
Note: Address input pins 3, 4, 5, 6, and 9 are used (pins 7 and 8 having no connection in the chip). Pin 3 is the least-significant bit. Pin 9 becomes the pitch-shift input. Pin 6 is the most-significant bit of the BCD inputs. The binary numbers in this table will be listed with the least-significant bit to the right--pins 9 through 3, respectively. Numbers with pin 9 at logic 0 will be played after the decimal point (following the convention of the Nattering RAM). A comma separates pin 9 (pitch shift) from the BCD input lines.
- 0,0000-"zero" or "oh" (in high voice)
- 0,0001--"one" (in high voice)
- 0,0010--"two" (in high voice)
- 0,0011--"three" (in high voice)
- 0,0100--"four" (in high voice)
- 0,0101--"five" (in high voice)
- 0,0110--"six" (in high voice)
- 0,0111--"seven" (in high voice)
- 0,1000--"eight" (in high voice)
- 0,1001--"nine" (in high voice)
- 1,0000--"zero" (in low voice)
- 1,0001--"one" (in low voice)
- 1,0010--"two" (in low voice)
- 1,0011--"three" (in low voice)
- 1,0100--"four" (in low voice)
- 1,0101--"five" (in low voice)
- 1,0110--"six" (in low voice)
- 1,0111--"seven" (in low voice)
- 1,1000--"eight" (in low voice)
- 1,1001--"nine" (in low voice)
- 1,1110--"arf" (for overflow)
The new board can be built on a rectangular piece of perforated board about 2-1/2 by 5 inches. The interconnecting socket (actually, a PC-mount male matching ribbon cable) was provided so that this board could be connected to our Smith-Kettlewell Talk-&-Tones meter board. The ribbon connector, 5V regulator, and DIP switch take up 2 inches at one end; the ISD1016 and the NAND gate take up the remaining 3 inches.
Because the NAND gate is so much smaller than the speech recorder, there is plenty of room for a mike jack and two small pushbuttons (start and power-down) in the 3-inch section.
Two idiosyncrasies of the ISD chip had to be accounted for before simulation was complete. First, as mentioned above, the 300 microseconds needed for each address to be latched before starting the chip turned out to be significant; the Nattering RAM permits you to alter the address lines even as you "start" it. To make this chip work with the Talk-&-Tones circuit, a capacitor from the start line to ground was needed just to slow things up a fraction. Second, our ISD1016 generates a false pulse on the end-of-message line intermittently. Although very short, this was enough to reset the flip-flop before a word was complete. We got rid of this artifact by running pin 25 through a low-pass filter.
A 14-pin ribbon-cable connector is used for interfacing, but this choice is up to you. Terminals required are: ground, VCC, the unregulated supply, the four address lines, a pitch-shift line (which is a higher-order address line), the "start line," the "abort line," a "word-active output," and a "NOT word-active output." For the Talk-&-Tones meter, an audio input to the ISD chip is also required.
Power Supply Circuit
An unregulated source of 7V or greater has its negative terminal grounded. Its positive terminal goes to the input of an LM317 voltage regulator, and this input is bypassed to ground by 22uF (negative of this cap at ground. The "adjust" pin of the LM317 goes through 680 ohms to ground, as well as going through 240 ohms to its output pin. The Adjust pin is bypassed to ground by 4.7uF (negative of this cap at ground).
The output of the LM317 goes to the 5V VCC line, and is bypassed to ground by another 22uF (negative of the cap at ground).
Circuitry Surrounding the ISD1016 Chip
Pins 12, 13, and 26 are grounded. Also grounded are the unused address pins--most certainly pins 1, 2, and 10. (Pin 3 is also grounded if the sixteen-word version is built.)
Pin 28 goes to VCC; between pins 28 and 26 (pin 26 being grounded) is a 0.1uF disc capacitor. Pin 16 goes through 33 ohms to VCC; pin 16 is bypassed to ground by the parallel combination of 22uF and 0.1uF (negative of the electrolytic at ground).
Pin 15 goes through 8.2 ohms to one side of an 8-ohm loudspeaker. The other side of the speaker goes to the switch contact of a closed circuit earphone jack. The tip contact of the jack goes to the negative end of a 100uF electrolytic capacitor, with the positive of this cap going to pin 14. The sleeve of the earphone jack is grounded.
Pin 19 goes through the parallel combination of 300K and 22uF to ground (negative of the cap at ground). Pin 21 goes through 0.47uF to pin 29.
Pin 27 goes through a 47K resistor to VCC; pin 27 also goes through the "record" toggle switch (a spare DIP switch) to ground. Pin 24 goes through 47K to ground; pin 24 also goes through a normally open pushbutton ("reset") to VCC. Pin 23 goes through 47K to VCC; pin 23 also goes through a normally-open pushbutton ("start") to ground.
Pin 17 goes through 0.22uF to the tip contact of the mike jack. The sleeve of this jack is grounded.
Each address pin to be operated--perhaps pin 3, 4, 5, 6, and 9--goes through its own 47K resistor to ground, and each of these pins goes through a switch to VCC (using a bank of DIP switches).
A CD4011 quad 2-input NAND gate is added to the board. Pin 7 is grounded, while pin 14 goes to VCC.
In order to prevent damage to external circuitry, diodes are used in all the address lines, "pitch shift," and "abort" inputs. Considering the 32-word model (the one with "pitch shift"), the "1" line goes to the anode of a diode whose cathode goes to pin 3 of the 1016. The "2" line goes to the anode of a diode whose cathode goes to pin 4. Similarly, the "4" line goes through a diode to pin 5, the "8" line goes through a diode to pin 6, and the "pitch shift" line goes through a diode to pin 9. The "abort line" goes to the anode of a diode whose cathode goes to pin 24 of the 1016.
The "word active" outputs are generated by a NOT-R/NOT-S flip-flop made from a pair of gates in a 4011 as follows: The pin 11 output of one gate goes to the pin 9 input of the other, and the pin 10 output of the second gate goes to the pin 12 input of the first. Pin 8 is the "NOT reset"; the end-of-message pin, pin 25, goes through 47K to pin 8 of the 4011, with pin 8 also going through 0.1uF to ground. The output of this gate, pin 10, is the " NOT word active" output, while pin 11 is "word active." Pin 13 goes to pin 3, the output of an inverter discussed below.
To make the other gates into inverters, input pins 2 and 5 are tied to VCC. The "start" input line goes through 47K to ground; this line also goes to pin 1 of the 4011. The output of this inverter, pin 3, goes through 0.1uF to pin 6, the input of the second inverter. Pin 6 also goes through 47K to ground.
Pin 4 (which pulses on the trailing edge of the start pulse) goes to the cathode of a diode; the anode goes to pin 23 of the 1016.
Additions for the Talk-&-Tones Multimeter
The "start line" is bypassed to ground by 0.1uF. The audio output network from the 556 tone generator goes through 0.22uF to pin 11 of the 1016.
- Resistors (1/4-watt 5%):
- 1--8.2 ohms
- 1--33 ohms
- 1--240 ohms
- 1--680 ohms
- 5--0.1uF disc
- 2--0.22uF disc or Mylar
- 1--0.47uF Mylar
- 1--4.7uF 6V electrolytic
- 4--22uF 6V electrolytic
- 1--100uF 3V electrolytic
- 7--1N914 diodes
- 1--LM317T regulator
- 1--CD4011 quad NAND gate
- 1--ISD1016 recorder chip
Switches and Jacks:
- 1--block of six DIP switches
- 2--normally open push buttons (use the best-quality one you have on pin 23.)
- 1--open-circuit jack for mike
- 1--closed-circuit jack for earphone
- 1--13-pin terminal block; we used the 14-pin ribbon connector, Digi-Key CHW14G-ND with accompanying ribbon cable, Digi-Key C3AAG-1406M-ND
Pin Connections for the LM317T
With the mounting surface toward you and the leads pointing up, the three leads are, from left to right: "adjust," "output," and "input."
The recorder chips are available directly from the factory:Information Storage Devices, Inc., 2841 Junction Ave., Suite 204, San Jose, CA 95134; Phone: (800) 825-4473. Their technical support has been responsive and friendly: Mr. Joe Jarrett, (512) 263-5600.
Using the ISD 1016 speech recorder, the vaudevillian can arm himself with this recordable addressable sound-effects box. A ten-button "Joke Punctuator" is described here, as well as a pseudo-randomly addressed circuit that operates from a single switch, and whose message is chosen by "pot luck," so to speak. This circuit has its serious sides as well. You could make your own talking dolls with the randomly selected circuit. Communication-impaired people would perhaps find the ten-button version useful, selecting messages like "Please hold the door," and the like.
For some time, the editor's prank has been to build a speech-in-RAM recorder for party applications. Every time I finished what I thought was a spare Nattering RAM board, someone would heist it for a practical purpose; it is only with the emergence of this ISD "voice-message chip" that I have been able to make circuits faster than the arising needs.
My particular prank is a talking mobility aid. Imagining myself in seminars on the subject: "Whereas other mobility devices present obstacle information in codes that require trained users to interpret them, this device speaks in plain language that any blind traveler understands. Called the 'Simulated Sighted Guide' (SSG), it speaks to you as helpful citizens do when directing you hither and thither."
The SSG contains a motion sensor (a switch made from a weight on a slip of springy shim stock that taps against a stationary contact), and when you pick it up to carry it about, it speaks the following ten messages in somewhat random selection:
"You're almost there." "It's over there," cried out off mike. Where're you trying to go?" "You're doing fine!" "Over a little." "Left, I mean right!" "More that way." "Easy does it." "That's right." "Watch yourself!"
Well, it's pretty good fun. The number of coincidences--"Left, I mean right!" when you're approaching a turn, "Watch yourself!" or "You're almost there." when you are about to tap an obstacle with your cane--are enough to convince any astrologers in a group that there's something to it.
Since you can record anything in these message slots--drum rolls, whistles or whoops--and since you can trigger the speech chip with any switch, you can use the "Prankophone" for any gag you like.
Our unit is built into a plastic project box measuring about 4 by 6 by 2 inches. The speaker, a 3-inch good-quality one, is mounted against the large face (the bottom) of the box, and the circuit board is mounted on 1-1/4-inch spacers behind the speaker magnet. The circuit board, 2-1/2 by 4-1/2 inches, is festooned with DIP switches and slide switches, as well as a pushbutton for recording. There is room beyond the edges of the circuit board to mount any jacks or switches that are to be used on the outside, once the cover plate of the box is secured.
On the circuit board, the following switches are required: (1) a pushbutton actuator switch, (2) a PC-mount slide switch to select "record/playback," (3) appropriate switches to disable address activity and unwanted actuation while recording, and (4) a bank of four DIP switches to select addresses for recording.
The stuff on the outside of the box is your choice. The vaudevillian may want an output jack to pipe into his sound system (listed as an earphone jack here), and the magician may want a remote-actuator jack so that he can make the box go off when he massages his underarms. Certain models will need an on/off switch. We, for lack of room on the board, mounted the input jacks on the aprons of the cabinet as well.
Although there are four DIP switches available to control the address lines, the address scheme of the ISD series of chips is such as to bar addresses whose first two bits are "1" (see SKTF, Winter 1991). More than ten slots of shorter time could be accommodated if you hand lower-order address lines to some controlling circuit.
The addresses used here are the four higher-order bits fed to pins 10, 9, 6, and 5 (allowing ten 1.6-second messages). Listing them with pin 10 at the left, the ones used are: 0000, 0001, 0010, 0011, 0100, 0101, 0110, 0111, 1000, 1001 (BCD, 0 through 9).
Note that the on/off switch differs for various versions described here. It seems natural that both the talking-doll and ten-button versions should come on as soon as you press a button. This is the reason for using the VMOS power-FET switch.
In contrast, the motion-sensitive instrument presented the problem of bouncing a message on and off (resetting the power-down pin every time the switch bounced). Therefore, for the single-actuator device, no automatic reset for pin 24 is provided. This has the disadvantage of sometimes allowing the device to play beyond the last message and freezing operation of the chip; when the chip locks up accidentally, the user is obliged to operate the power switch manually to reset the recorder chip.
If a motion sensor is used, there must be a way of disabling this, too, when recording. We use one of my business cards jammed between the contacts. (Finally! a use for my business card besides mixing glue.)
Sorry about all the diodes in the ten-button version. I tried to find a 10-to-BCD encoder chip to eliminate diodes in the address lines, but the one I found used "negative logic," ultimately requiring lots of inverters. (You can omit every other pushbutton to get 3.2-second message slots, using fewer diodes.) Now that diodes are a dime a piece, what the hey.
Circuitry common to all versions
An LM317 is used to establish a 5-volt VCC. The 317's input is bypassed to ground by 22uF (negative of this cap at ground).
The output of the regulator goes through 240 ohms, then through 680 ohms to ground. The junction of these resistors goes to the 317's "adjust" pin; this junction is also bypassed to ground by 10uF (negative of this cap at ground). The output of the LM317 goes to the 5V VCC line; VCC is bypassed to ground by 22uF (negative of this cap at ground).
On the ISD1016 speech recorder, pins 1, 2, 3, 4, 12, 13, and 26 are grounded. Pin 28 goes to VCC (plus 5V); pin 28 is bypassed to pin 26 by 0.1uF (pin 26 being grounded). Pin 16 goes through 33 ohms to VCC; pin 16 is bypassed to ground by 0.1uF in parallel with a 10uF electrolytic (negative of the electrolytic at ground).
Pin 19, the AGC pin, goes through the parallel combination of 300K and 22uF to ground (negative of this cap at ground). Pin 17 goes through 0.22uF to the tip contact of the microphone jack (a closed-circuit mini jack). The switch contact is tied to the sleeve, which is grounded. Pin 21, the output of the mike preamp, goes to the switch contact of a closed-circuit high-level input jack. The tip contact goes through 0.47uF to pin 20. The sleeve of this jack is grounded.
Pin 15 goes through the series combination of 8.2 ohms and an 8-ohm loudspeaker to the switch contact of a closed-circuit earphone jack. The sleeve of this jack is grounded. The tip contact goes to the negative end of a 100uF capacitor, with the positive end of this cap going to pin 14.
Pin 27, record/play, goes through 47K to VCC; pin 27 also goes through an SPST toggle switch to ground (closed for record). Pin 24, "Power-Down," goes through 200K to ground. Pin 23, enable, goes through 47K to VCC.
Pseudo-Random Addressing System
An Intersil ICM7250 2-digit BCD timer chip is used (see SKTF, Winter 1986); the four outputs of the least-significant digit are used to feed the address lines of the ISD1016 with a constantly changing BCD number. (An ICM7260 could do as well.) This timer is set up to free run; however, a switch on the trigger and reset lines is needed to disable this timer while you record.
Pin 9 of the 7250 is grounded; pin 16 goes to VCC. To enable its internal clock, pin 14 goes through 47K to VCC. Pin 13 goes through 1 megohm to VCC, as well as going through 0.1uF to ground (thus generating 10 clock pulses per second).
Pin 10 (reset) goes through 47K to ground; pin 10 also goes through one pole of a DPST "disable" switch to VCC. Pin 11 (trigger) goes through 47K to VCC; pin 11 goes through the other pole of the disable switch to ground.
Timer Output pins 1, 2, 3, and 4 each go through their own 47K resistors to VCC. Pins 1, 2, 3, and 4 of the 7250 also go to the recorder chip's pins 5, 6, 9, and 10, respectively. Finally, these lines all go through SPST DIP switches to ground.
[Note that with this arrangement, opening a DIP switch brings its address line to a logic 1; closing it means logic 0. When the recordings are finished, these four DIP switches should be opened so that the open-drain outputs of the Intersil timer can operate the address lines.]
Motion-Activated Version with Manual On/Off
The pseudo-random addressing circuit above is used.
The negative side of a 9-volt battery is grounded. The positive of the battery goes through an SPST switch to the input of the LM317 regulator. Pin 23 of the recorder chip goes through a normally open pushbutton to ground. Across this pushbutton is the series combination of an SPST slide switch (disabling the actuator) and any actuator which is a normally open switch (Radio Shack "Vibration Detector," No. 45-521). If the device is to be triggered remotely, the sleeve of a 1/16th-inch open-circuit submini jack is grounded, while its tip contact goes to pin 23.
Talking Doll Version with Single-Button Operation
The pseudo-random addressing circuit is used.
The positive of a 9-volt battery goes to the input of the LM317 regulator. The negative of the battery goes to the source of a VMOS power FET (Siliconix VN0300M or VN10KM). The drain of the FET goes to the ground bus of the circuit. The gate of the FET goes through 10 megohms to the FET source. This gate also goes to the negative end of a 2.2uF tantalum capacitor; the positive lead goes to the plus 5V VCC line.
One side of the pushbutton goes through 33 ohms to VCC. The other side of the switch goes to the anodes of two 1N914 diodes. One cathode goes to the gate of the FET. The other cathode goes through 47K to ground, as well as going through 0.1uF to pin 24 of the recorder chip.
The second cathode also goes through 47K to the base of a 2N2222 transistor, the emitter of this 2222 being grounded. The 2222 collector goes to pin 23 of the recorder chip.
Ten-Button Selectable Message Version
No 7250 chip is used. Neither are DIP switches on the address lines required. This version uses "diode logic" for addressing the recorder chip.
The positive of a 9-volt battery goes to the input of the LM317. The battery's negative goes to the source of a VMOS FET (Siliconix VN0300m or VN10KM). The drain goes to circuit ground. The gate goes through 1 megohm to the source. This gate also goes to the negative end of a 4.7uF tantalum capacitor, with the positive end going to the 5V VCC line.
All ten normally open pushbuttons (SPST momentary switches) have one contact going to a common junction; this junction of all the switches goes through 33 ohms to the 5V VCC line. The free contact of each switch goes to the anode of its own 1N914 diode; the cathodes are all tied together and go to the FET gate.
Also on each switch (the contact already bearing a diode anode), the anode of another diode is connected; all ten cathodes of this latter set go through 47K to ground, with these cathodes also going through 0.1uF to pin 24 of the recorder chip.
The junction of the 47K resistor and these cathodes also goes through 47K to the base of a 2N2222, the emitter of which is grounded. The collector goes to pin 23 of the recorder chip.
On the recorder chip, pins 5, 6, 9, and 10 each go through their own 47K resistor to ground. These pins are pulled up with diodes on the switches as follows (cathodes toward the chip pins and anodes to the switches):
Switch 0 has no diodes going to the pins. The diode contact on switch 1 goes through a diode to pin 5. The diode contact of switch 2 goes through a diode to pin 6. The third switch goes through two new diodes to pins 5 and 6, and so on. These are tabulated below:
- Switch 0--No Address Pins
- Switch 1--Pin 5
- Switch 2--Pin 6
- Switch 3--Pins 5 and 6
- Switch 4--Pin 9
- Switch 5--Pins 5 and 9
- Switch 6--Pins 6 and 9
- Switch 7--Pins 5, 6, and 9
- Switch 8--Pin 10
- Switch 9--Pins 10 and 5
Our motion-sensitive box could not have the automatic reset feature; when we gave it one, it would sputter beginnings of messages and would rarely finish one. Without automatic reset, however, the chip may lock up if the switch stays closed during the end of the final message.
A cheap cure for this is to save the last slot for a short message. Before you record this, though, record a few dead-air messages of successively decreasing lengths with the idea of putting several end-of-message markers immediately before the memory runs out. This greatly reduces the chance of accidental spill-over.
It helps to start with the recorder stripped of end-of-message markers. When starting anew, record over everything by starting at zero and holding down the button for sixteen seconds. With a clean slate, record your messages in binary succession, one address after another. This will minimize the chance of planting an end-of-message marker at the beginning of one you might run into. Then, when you have selected the next address to be recorded, test it on playback to see if the item you just recorded causes the chip to stop playing, which will happen if its marker lands in the new message slot.
My next Prankophone will be one that just harps at you with random messages--triggered electrically. I reckon I'll use a 555 (free-running very slowly, generating narrow pulses) in combination with a high-order bit from the 7250 counter. Combining them in an AND, so to speak, and with the 555 running out of sync with the counter, these signals will coincide at different times, and their chance happening will be made to trigger pin 23.
[How do you end an article like this?] Bye!
Intended for driving stepper motors, solenoids and the like, these chips are ideal for running real-world stuff from TTL circuitry or from the good-ol' 555. We are using them to pulse large LED arrays from 555 oscillators. Since these chips have open collector outputs, they can control items running from as much as 30 volts, or they can be used as an interface between TTL logic levels and logic running at different levels.
The chips listed here are all 8-pin packages containing two gates. The 75451 is an AND, the 75452 is NAND, the 75453 is OR, and the 75454 is a NOR. Their pin assignments for inputs and outputs are identical. The inputs are all TTL (requiring either "contact closure" to ground, or a current sink of 1.6mA to bring an input to logic low).
The outputs are collectors of NPN transistors whose emitters are grounded. A device to be operated goes from the open-collector output to some positive supply--perhaps an unregulated voltage not to exceed 30 volts. If the outputs are taken through pull-up resistors to a voltage different from the 5V VCC of the TTL project, these outputs can then be used to interface with logic of a different voltage. Don't forget that, being open-collector, these devices can be run in parallel to handle even higher loads.
Their absolute maximum input voltage rating is 5.5V; absolute maximum supply voltage is 7V.
The minimum logic high is 2V; the maximum logic low is 0.8V. The maximum current for logic low is the standard 1.6mA. (They list a logic high current of 40 microamps.)
Their "off-state" output voltage is 30V. For the outputs, the continuous collector current is 400mA; however, they can sink 500mA pulses if these are less than 10 milliseconds in width (50% duty cycle). For the DIP plastic-packaged version, the total-package power dissipation is 1 watt.
The "propagation delay" for the inverting units is 25 nanoseconds. Having extra stages in them, the AND and OR units have a propagation delay of 35 nanoseconds.
The units with the highest power dissipation are those with the suffix "P" (for "plastic").
This applies to all four chips above.
- Pin 4--Ground
- Pin 8--VCC
- Pins 1 and 2--Inputs (gate 1)
- Pin 3--Output (gate 1)
- Pins 7 and 6--Inputs (gate 2)
- Pin 5--Output (gate 2)
Whereas the National LM336 voltage reference diode requires about 200 microamps to work well, this new band-gap reference by Linear Technologies functions very well at about 1/10th of this current. It is used like a zener diode. The term "band-gap" comes from quantum mechanics, and if your editor were a physicist, I would put forth the theory behind it. Suffice it to say that an equivalent circuit in the literature shows perhaps twelve transistors as part of the make-up.
It comes in a TO92 package--the little half-round plastic fellow. With the flat side toward you and the leads pointing upward, the three leads are, from left to right: minus ("anode"), plus ("cathode"), with the right-hand lead having no connection.
Like a zener, it is operated in series with a current limiting resistor, this combination being across a voltage which is higher than that of the device. The value of this resistor is chosen so that under the expected maximum load current, there should still be 10 or 20 microamps running through the device (this current depending on which version you have).
Suppose we wished to run a circuit at 2.5V that drew 50 microamps, with the whole project running off a 9-volt battery. We would choose the LT1004-2.5 (the 2.5V version). The current without a load should be perhaps 70uA, so as to have 50uA available for the load, reserving 20uA for proper operation of the reference device. Thus, we want a resistor which, when 6.5V is placed across it (9V minus 2.5V), will draw 70uA; 6.5 over 7 times 10 to the minus 5th is 0.93 times 10 to the 5th. A 91K resistor will do the trick.
Assuming that this reference is a positive 2.5V based at ground (which it doesn't have to be), the negative side of the LT1004-2.5 is grounded. The positive lead goes through 91K to plus 9V. The load is connected across the LT1004.
There are two versions: the LT1004-1.2 (1.23 volts) and the LT1004-2.5 (2.5 volts). These are nominal values; the 1004-1.2 can be anywhere between 1.22 and 1.245 volts, and the 2.5V unit will fall between 2.46 and 2.535 volts.
Where their precision shines is the ability to maintain the voltage over a wide range of currents and temperatures. Both devices will maintain their voltage to within 1mV for currents up to 1 milliamp (at room temperature); this change could be as much as 1.5mV at other temperatures (between 0 and 70 dg. C). The average temperature coefficient is 20 parts per million per degree C. Over a range of currents from 1 to 20 milliamps, the voltage may change by 10mV. At 100uA, the typical impedance is 0.2 ohms.
Although a device may start limiting the current at 5 or 6 microamps, they list typical and maximum required currents to maintain precision of the output. For the 2.5V unit, this requirement is typically 12uA with a maximum requirement of 20uA. For the 1.23V unit, the typical requirement is 8uA, maximum 10uA.